I need to change single tone frequency during operation. The kinds of frequency is four so I use 2 PROFILE pins
Ref. clock is 1GHz.
Two PROFILE pins are changed simultaneously by FPGA, but not synchronized with SYNC_CLK.
If I change PROFILE pins, what is the maximum time for new frequency to be stabilized?
The rate of the change of frequency is determined on how fast the internal state of the DDS changes.This is determined by the SYNC_CLK which is 1/4 of the SYS_CLK.