I have some problem when i use AD9957,i configure AD9957 in QDUC mode,reference freq is 640M, lvds standard voltage,pdclk rate is configure as 1/2 mode,set i data at rise edge of pdclk and set q data at fall edge of pdclk, set pdclk's polarity inverse,dds's freq is 140M,fpga generate i and q by use dds ip,generate sin and cos, frequency is 1M, sample frequency of i and q is 32M,pdclk is 64M.when temperature is lower, AD9957's output have random flashing signal, spctrum is very bad,this problem is only relative to pdclk's frequency and temperature, when frequency of pdclk is lower, spectrum is good,when frequency of pdclk is high, spectrum is bad.reference source is verg good.
Thank you for opening this up. May I know the temperature range you are doing this when you observed the spectrum. Thanks
Thanks for your reply,I place the board in the low temperature test chamber when I do the test,temperature range is -55~+85℃.When the temperature drops to -10℃, Random signals began to occasionally appear in the spectrum.As the temperature decreases further, the random signal is more and more,likes the picture left.When the temperature drops to -40,spectrum is bad like picture right.I've tried to supply the clock with a signal source,agilent 8257d,But it has no effect.
AD9957 is on the FMC subboard,My fpga is on the morther board,there is no IO buffer between fpga and AD9957.The trace length is very short between fpga and ad9957,example d0~d17,pdclk, about 10 cm.
Fpga use dds ip core to generate sine and cos signal under the synchronization of PDCLK,and use a ODDR primitive to output iq data at rise and fall edge.Today,I place a MMCM after pdclk input,MMCM is configure to only as a clock buffer,not in frequency systhesis mode,use the function of "minimize output jitter".It's interesting that random signal is not present until the temperature drops to -40.
Thanks,My problem have been resolved,The reason is that the source synchronous clock is unstable due to the instability of FPGA kernel voltage.