Hello all. On page 30 of the AD9959 pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9959.pdf - there is information involving IO Update.
Can I ask if there might be an error with that information?
For the original diagram of Fig. 40, I can see that --- if the IO UPDATE voltage is HIGH and when a rising edge from SYNC_CLK occurs, then that will be point 'A' on the diagram, which represents 'registration' (preparation) of the data in the I/O buffers. Then, at the next rising edge of SYNC_CLK (which marks point 'B'), the contents of the I/O buffers is then transferred to a relevant AD9959 data register.
For the original diagram of Fig. 40, it can be seen that the activity at 'A' and 'B' occurs when the data contained in the 'BUFFER' (ie. bottom of the diagram) is "N+1".
So, when event 'B' occurs, the Data Register (second-last row of Fig. 40) should take in (ie. read in) the contents "N+1", instead of reading in contents at "N", right?
The I/O buffer contents represents the beginning of the journey, while the data register represents the destination (or end) of the journey, right?
It would be better to ensure that the data is completely loaded in the I/O buffers before using an I/O update to transfer this data to the registers. That's why Data in Registers at point B is N b…
It would be better to ensure that the data is completely loaded in the I/O buffers before using an I/O update to transfer this data to the registers. That's why Data in Registers at point B is N because N is already loaded while loading of N+1 in the I/O buffers is still ongoing.
Thanks very much for your time and help Mark. That definitely makes sense now. I incorrectly assumed that those buffers were not FIFO ones. Much appreciated.