I am using AD5262 for implementing one automatic gain control stage in one of my ckt . AD5262 is having dual channel digitally varying resistor latches and I m using this in the feed back path of two op amp based amplifier which connected in series manner . I tried to configure the digipot from ZYNQ FPGA by writing one 8 bit word to each RDAC of AD5262. The  SCK clock i chosen as 12MHz (in data sheet I hv read maximum clock frequency is 25Mhz) .But i am not able to find any amplification/attenuation at the output of amplifier after writing gain word to digipot .The first amplifier is giving a rectangular wave representation of the 12.5khz sine wave i hv feeded at input to amplifier.

Attaching the screenshot of Chip select ,sck.sdi lines of the digipot . KIndly help to resolve the issue. I hv to configure the device from FPGA itself as the dgipot is residing in a board which is having FPGA as processing platform