AD5933 receiver stage problem

TL;DR: I think the VDD/2 reference in the reciever stage of my AD5933 is messed up.

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I am working on an AD5933 for a bioimpedence application.

Following the paper https://www.mdpi.com/2079-9292/4/1/1 I have decouples the reciver-end of the AD5933 from the AFE and shorted out RFB and VIN. The intention is to make the first op amp at VIN into a voltage follower. The PGA is set to x1 amplification. I should be able to measure the fourier transform of a DC signal proportional to VDD/2.

Eksperimental setup:

Start Freq Register = 2^15 (32768=1kHz@16.776MHz)*
Freq Incr Register = 0
Settling Cyckles = 255

* The frequency corresponds to one whole DDS sinewave cycle in the DFT.

My problem is now:

1) When measuring the voltage signal at RFB (or VIN) with an oscilloscop during a scan I get a nice DC signal that creeps up. Starting from arround 3V at the beging of a scan ending at 55mV from the 5V rail.

2) This effect shows up in the DFT readouts; most prominent in the real register at this freqency

The imaginary register shows the same signal but at a lower level (and more noisy)

"What is going on with my chip"???

Teddy



Added TLDR note and tag
[edited by: tfsoft at 10:05 PM (GMT 0) on 15 May 2019]