AD9859 REFCLK

Hi

I have a 20MHz OCXO already on the board and want to use the CMOS output as an input for the AD9859 but i'm not quite sure if i calculated the levels correctly:

The clock is a 0V - 3.3V square wave so i divide the clock voltage by 2 (resistors) to get  into the specified range(-15 to +3dBm 1.5kOhm). Do I have to AC couple the signal now? I haven't found a example circuit for single ended input.

Thank you!

Lukas

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    •  Analog Employees 
    on Sep 20, 2018 3:40 PM

    Although not spelled out clearly in the data sheet, the dBm values are based on 50Ω (industry standard for most measurement instruments). That said, the +3dBm value equates to 316 mVrms (~890 mVpk-pk).

    A resistor network that divides the 3.3V swing of the OCXO's CMOS output by 4 should work well, yielding 825 mVpk-pk. That is, use a 3:1 resistor ratio. A 300Ω series resistor followed by a 100Ω shunt resistor should keep the impedance low enough to be unaffected by the AD9859's input impedance (1.5kΩ) yet high enough to prevent overloading the CMOS driver. You may need to experiment to get the optimum solution.

    Yes, you must use DC blocking capacitors on both inputs. Connect the capacitor on the unused input to the AD9859's VDD. The capacitor values should be such that the R-C time constant is at least 10 times greater than the period of the clock signal. Note that R is the parallel equivalent of the two voltage divider resistors (in this case, 300Ω || 100Ω = 75Ω).

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