AD9915 Output Signal level

It is not quite so simple. Forget about dBm and power. When considering the output of the DAC, there are only two considerations:

1. maximum DAC current
2. voltage on the DAC output pin(s)

The maximum DAC current is the current that results from the external Rset resistor. For example, with Rset=3.3KΩ, the maximum DAC current is 20.48mA. This is the DAC output current that results when the DAC input code is full scale. Conversely, when the DAC input code is zero, no current flows. The DAC output current scales linearly with the input code. This is for the normal DAC output pin. The complementary DAC output pin does the opposite (no current for full scale code, max. current for zero code).

Note, the DAC output is two current sources (balanced) with each current source sinking current through an internal 50Ω resistor terminated to VDD. Any external connection provides a secondary path for current flow. Hence, the output current splits between the internal and external loads. Because of the internal termination to VDD, the output signal is referenced to VDD. 

The voltage at the DAC output pin(s) results from the DAC output current flowing through the internal 50Ω load and any external connection. Note the external connection provides a secondary current path. The voltage on the pin is the product of the DAC output current and the total equivalent load (50Ω in parallel with the external circuit). Be aware that from a sinusoidal perspective, the DC bias point equates to 1/2 of the maximum DAC current (10.24mA), with the current swinging above and below this value in sinusoidal fashion. In the end, you must ensure the voltage swing at the DAC output stays within the voltage compliance limit (500mV above and below VDD).

Having said all that, we can move on to dBm. If you connect an external 50Ω load (terminated to VDD) to one of the DAC outputs, the total load is 25Ω. The peak to peak voltage at the DAC output pin is then: 25Ω x 20.48mA = 512mVpp (181mVrms). Before going any further, 512mVpp is within the voltage compliance limit (1Vpp centered on VDD), so we're OK in terms of voltage compliance. The 181mVrms signal appears across the external 50Ω load. Hence, the load power is (0.181^2)/50 = 0.655mW (-1.8dBm).

You can extend this line of thinking to using both DAC outputs simultaneously and finding the total power dissipated by a differential load.

I was planning of using the output of DAC (single ended) connecting  a Frequency multiplier(x3 or x4) and working at a higher carrier frequency.  By making use of what you told, having -1.8dbm output power on a 50ohm external load is not enough. I would need to amplify the DAC output to satisfy Frequency Multiplier input power condition. 

Can I get Dac output single ended(leaving complementary leg NC), or should I assume it is differential always? Hence, should I work for a differential amplifier or a single ended configuration in next stage?

Generally, it is better to use the balanced output of the DAC as there is some benefit in terms of reduced harmonic distortion. The balanced signal tends to cancel even-order harmonics. Furthermore, you get the benefit of twice the output level.

If you use a single ended configuration, load the unused output the same as the used output for the best spurious performance.

The schematic of the AD9915 Evaluation Board shows one way to make use of the full balanced output signal.