MAX31722
Production
The MAX31722/MAX31723 digital thermometers and thermostats with an SPI/3-wire interface provide temperature readings that indicate the device temperature...
Datasheet
MAX31722 on Analog.com
MAX31722 datasheet Table 5 is somewhat confusing (not incorrect, just incomplete).
Please refer to Figure 7 which shows clearly when the input data is latched and when the output data is shifted for both SCLK modes.
Since based on the question you are probably looking at CPOL = 0, in this case the data is shifted out on SDO on the rising edge, and captured by the part on SDI on the falling edge of the SCLK clock. This matches Figures 8/9.
