AD5290: Nominal resistance

Question You state the Nominal resistance tolerance as being +/- 30% in Rheostat mode, what is the typical production spared in tolerance? I realize the 'stock' answer would be +/- 30%, but this I feel, is the absolute minimum and maximum to cover all eventualities. Answer +/-30% is the maximum part-to-part tolerance that we specify, and is a measurement at 25degC. The temperature coefficient is in addition to the +/-30% inital part-to-part spread. Each lot is likely to have a spread that is less than +/-30%, and any outlying parts are scrapped in final test (at ADIs expense.) To give you an idea of the historic spread in total resistance (R_AB), devices which passed have generally been well within the test limits, and only a few devices were totally outside the max/min test limits (reject devices) To take the 50k device as an example, the mean has been about 53k although it has been up as high as 55k and down as low as 52k. The (mean + 3sigma) distribution has been over 61k for some lots and the (mean - 3sigma) has been down as far as 47k for some lots, although lately the (mean +3 sigma) has been around 57k and the (mean - 3sigma) around 50.5k. Having said all this, it is quite possible for us to ship a batch of devices in the future whose resistance is at the upper or lower extreme of the specification, and you would have no right to a refund or an explanation, or to request devices from a different batch that happens to work in your application. In order to design to a tighter tolerance you would need a means of screening devices before they are populated on the board (to avoid expensive board rework). You would also need to accept the responsibility for scrapping any devices that don't meet your tighter specifications. As well as the financial cost, there can also be operational implications if you can't get hold of devices which meet your tighter limits for an extended period, because our process has shifted for whatever reason. So my advice would be to use the +/-30% specification if you are using the device in Rheostat mode. If you need a tighter tolerance, you might consider using a circuit which depends on the matching between Raw and Rwb in the same IC or the matching between Rab on a DUAL potentiometer IC. e.g. the AD5262 are dual pots with channel resistance matching of typically 0.1%.

unused SDO output to tie or not to tie or leave it open that is the question

Question Can I leave SDO open, or is there any reason I must connect a pull-up to SDO? Answer The AD5290 SDO , is a Serial Data Output Pin. it has an Internal N-Ch FET with open-drain output. Even thought you do not use it. it can be left open.... but good practise, i have done in the past is to tie it off with a pull-up to avoid noise and high impedance feedback. just in case. Anyway having a resistor (e.g. 0605 or smaller) option designed in. you can pop and depopulate this at will later in the design as you see fit.