The internal ADC has a full scale input voltage of 625mV. The PGA (programmable gain amplifier) in front of the ADC has configurable gains of 8x or 32x, which reduce the input voltage range to 78.125mV (625mV/8) or 19.531mV (625mV/32). These full scale voltage ranges only come in to play if using an unsupported thermocouple type. If using a B, E, J, K, N, R, S, or T type thermocouple, linearization and cold junction compensation should happen automatically based on internal look-up tables. Looking at Configuration Register 1, the TC TYPE[3:0] bit field is used to select either a supported thermocouple type, or a voltage mode conversion with specific gain value. The full scale and INL error is reported based on applying a 78.125mV or 19.531mV signal in voltage mode and observing the change in output while sweeping the temperature.
The linearization error specification for each supported thermocouple type should be viewed on page 4 of the datasheet for table data, and pages 8/9 for graph data (for various cold-junction temperatures).
