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Documents AD536x and AD537x: FAQs
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  • +AD3552R: FAQ
  • +AD420: FAQ
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  • +AD5325: FAQ
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  • +AD5338: FAQ
  • +AD53500: FAQ
  • +AD5363: FAQ
  • -AD536x: FAQ
    • AD536: Using a potential divider
    • Selecting A Reference for the AD536x and AD537x DACs
    • How Does the PEC Function Work in AD536x DACs?
    • Selecting An Output Range for the AD536x and AD537x DACs
    • Using the Offset Register in AD536x and AD537x DACs
    • X1A and X1B Registers in the AD536x and AD537x DACs
    • AD536x and AD537x: FAQs
  • +AD5370: FAQ
  • +AD5383: FAQ
  • +AD5384: FAQ
  • +AD5405: FAQ
  • +AD5412: FAQ
  • +AD5413: FAQ
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  • +AD5422: FAQ
  • +AD5429: FAQ
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  • +AD5440: FAQ
  • +AD5443: FAQ
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  • +DAC Communication Troubleshooting: FAQ
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  • +DAC SPI: FAQ
  • +DAC8800: FAQ
  • +GENERAL: FAQ
  • +nanoDAC+: FAQ
  • +Precision Technology Learning Modules
  • +AD667: supply voltage
  • +AD1139: FAQ
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  • AD5627R: FAQ
  • +AD5667R: FAQ
  • +AD5671R: FAQ
  • +AD5675: FAQ
  • +AD5684R: FAQ
  • +AD5754: FAQ
  • +AD5755-1: FAQ
  • +AD664: FAQ
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  • +AD7547: FAQ
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  • +AD7805: FAQ
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  • +AD7809: FAQ
  • +AD7835: FAQ
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  • +MAX11311GTJ+T: FAQ
  • +MAX5054BATA+: FAQ
  • +MAX5100BEUP: FAQ
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  • +MAX5116: FAQ
  • +MAX5141: FAQ
  • MAX5214: FAQ
  • +MAX5214GUA+: FAQ
  • +MAX5215GUA+T: FAQ
  • +MAX5216: FAQ
  • +MAX5217: FAQ
  • +MAX5235AEUB+: FAQ
  • +MAX5259EEE+: FAQ
  • +MAX526CCNG+: FAQ
  • +MAX528CAG+: FAQ
  • +MAX5304: FAQ
  • +MAX5322: FAQ
  • +MAX543: FAQ
  • +MAX5525ETC+: FAQ
  • +MAX5533: FAQ
  • +MAX5541: FAQ
  • +MAX5550: FAQ
  • +MAX5705: FAQ
  • +MAX5715AAUD+: FAQ
  • MAX5719: FAQ
  • +MAX5719AGSD+: FAQ
  • +MAX5725AWP+: FAQ
  • MAX5774: FAQ
  • +MAX5774UCB+D: FAQ
  • +MAX5802BATB+T: FAQ

AD536x and AD537x: FAQs

Q.

How do I use the m and c registers on AD536x and AD537x DACs?

----------------------------------------------------------------------

A.

The AD536x and AD537x have an m and a c register per channel. The m register controls the gain of the transfer function and the c register controls the offset of the channel. The default value for the m register is 0xFFFF for 16-bit resolution DACs and 0x3FFF for 14-bit resolution DACs. The default value for the c register is 32768 for 16-bit resolution DACs and 8192 for 14-bit resolution DACs.

 

When the m register is programmed with a value less than the maximum (i.e. the default value) the slope of the transfer function is decreased. For example, the default output span will be reduced by half if the m register is programmed to half its default value. Note that changing the value of the m register does not change the value of 1 LSB. If the m register is set to half it’s default value the output range is also set to half the nominal output range. In this case the user can still use the full range of the input register (X1A or X1B) but the output will still change in units of 1 LSB (of the default values).

The c register can be used to add or remove offset from a channel. Each LSB is the same size as that of the data register. Offset can only be removed when the value in the data registers (X1A or X1B) is greater than or equal to the amount of offset to be removed. For example, X1A=200 and c = default-10 is equivalent to X1A = 190 and c = default. Obviously, if X1A =20 and c = default – 50, the output will not be able to remove add this much negative offset and output will be capped at its minimum value.

General Information:

This document covers the denseDAC family. AD536x refers to the AD5360, AD5361, AD5362 and AD5363 eight and 16 channel DACs. AD537x refers to the AD5370, AD5371, AD5372 and AD5373 thirty two and 40 channel DACs.

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  • ad5361
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