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    • AD536: Using a potential divider
    • Selecting A Reference for the AD536x and AD537x DACs
    • How Does the PEC Function Work in AD536x DACs?
    • Selecting An Output Range for the AD536x and AD537x DACs
    • Using the Offset Register in AD536x and AD537x DACs
    • X1A and X1B Registers in the AD536x and AD537x DACs
    • AD536x and AD537x: FAQs
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How Does the PEC Function Work in AD536x DACs?

Q.

How Does the PEC Function Work in AD536x DACs?

--------------------------------------------------------------------

A.

The AD536x parts have a Packet Error Check function (PEC) which indicates to the user that the serial write was accepted as valid by the AD536x. To use the PEC function the user must calculate an 8 bit checksum based on the 24 bit value being sent to the AD536x. The 24 bit value and 8 bit checksum are sent to the AD536x as a 32 bit write operation (see the data sheet for the timing diagram). If either the 24 bit value or the checksum are corrupted during the write operation the AD536x will detect this and the PEC pin will go low. The user must read from the control register to bring the PEC pin high again. The user can then retransmit the 32 bit frame.

The PEC checksum is calculated using the polynomial C(x) = x8 + x2 + x1 + 1. This corresponds to a binary word of 0b100000111. To calculate the checksum the MSB of the polynomial should be aligned to the first MSB of the 24 bit value which is a 1. An XOR operation is carried out. This will have the effect of changing the MSB to a zero and reducing the length of the 24 bit value. The polynomial is then realigned with the next most significant ‘1’ and the XOR operation repeated. This function is repeated, each time reducing the number of bits in the answer. The final time will produce an 8 bit answer which is the checksum. See the ‘crc8 calculator.xls’ file for examples.

General Information:

This document covers the denseDAC family. AD536x refers to the AD5360, AD5361, AD5362 and AD5363 eight and 16 channel DACs.

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