FPGA, but the AD5235 doesnA?t store the value. I think I am not providing all
needed signals or timings. Is it possible to get an explanation how to connect
the chip, focus on CS, WP and PR?
If you are not using WR and PR, then you should tie them high.
The /PR pin is a digital input, applying a logic low, will refresh the contents
of the scatch pad memory (RDAC register) with the current contents of the EEMEM
At power-on, the default value of the scatch pad memory is the value previously
saved in the EEMEM, therefore, to answer your question, on power-on the value
of the scatch pad will be loaded with the previously loaded contents of EEMEM,
without applying a logic low to /PR, you don't need an RC circuit connected to
/PR to ensure that the scatch pad is refreshed, as this is automatic on
To write to the part, you need only to connect CS, SDI and SCLK.