AD5321. We connected pull-up resistor to 3.3V on the SDA and SCL Pins. We can
control the AD5321 correctly by I2C Port, but I checked the datasheet, the
input high voltage is 0.7VDD Min, for 5V Power, it is 3.5V, and the FPGA's
output high level is 3.3V, so it seems there is some problem. If we apply the
AD5321 in this way, will there be some unstable issues in the future?
The problem with connecting the I2C bus to 5.5vdd is that it may blow the I/O
pins on the FPGA. When the output is low, current may flow from 5.5Vdd into the
I/o pin and blow this device depending on the internal circuitry of the FPGA.
The device will work using the current setup but we cannot guarantee it over
If you look to page 43 of the enclosed document it explain the setup needed to
guarantee operation. The diagram below figure1 in attacment will guarantee