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AD5363 AD5362_SPI communication with Blackfin processor

I’m little confused when I reading figure 25--the interface with blackfin DSP
from AD5636 datasheet shown in figure1.As I known, SPI contrller of blackfin
DSP supports 8bit and 16bit transfer as the figure1 shown. The timing shows the
SSEL(SPISELx in AD5363 datasheet) is pulled high after 16 spi clock from low
shown figure2. But AD5363 spi interface is 24bit data transfer. I think it
maybe cause some problems if connecting SPISELx to SYNC directly. . Would you
like give me some guidance?


This is an error in the datasheet. I think the diagram should refer to the
serial port (SPORT) rather than the SPI interface. I will check with the
Blackfin experts and correct the datasheet if necessary. It looks like this was
a copy and paste error from a previous 16 SCLK interface device.