Q
Being about to evaluate a design with an AD5429, I have not succededestablishing the SPI communication.
Detailed configuration:
variable-gain amp
SPI active SCK edge: H-to-L transition
update mode: asynchronous
Fsck<10MHz
Test failed:
starting the frame with SYNC\ H-L
transition
sending the sequence 0x8000 for
loading with zero
frame end by SYNC\ L-H
subsequent
update with LDAC\ H-L transition.
No gain-changing reaction can be observed.
A
There are several possible reasons why you might not be seeing any reactionfrom the AD5429.
Firstly, the DAC is loaded with zero scale when the part is powered on, so if
you again load zero into the DAC refgisters you will not see any changes. Try
loading with a different value to see if you get a reaction.
Digital Interface
Are the DAC and the ucontroller referenced to the same ground? (i.e. do the DAC
inputs see the same signal that the uC transmits?) Are the SCLK signals clean
and free of glitches? Extra "clock pulses" due to noise can cause the SPI
interface to lose synchronisation.
Have you respected the 13ns timing between the SYNC H-L and the SCLK H-L?
Do you apply 16 full SCLK cycles to fill the input register?
Do you write (intentionally or by accident) to the control mode of the part -
Control bits = 1101
Analog problems
Is the output op amp powwered from a bipolar (+/-) supply?
Have you connected the DAC similar to figure 37 page 15 of the REVA datasheet?
Is an input signal present at Vref? (if not you won't see anything change when
you change the gain)
