We want to design a 4 channel current loop (4-20mA) receiver with HART. We have
identified the AD5700 as usable for the HART interface (Master). Do you have
suggestion to how the design should be made to support four HART channels using
only one AD5700? Do we need a swtich to select between the four channels?
In principle, a circuit realization is possible by adding MUX circuitry to a
circuit such as Figure 28 shown in the AD5700 datasheet. However, we don't have
any reference design for this at this point in time. We have been planning to
evaluate such circuit, but haven't got to it, therefore we don't have any clear
recommendation for multiplexing HART between analog inputs.
The one thing I know may be an issue is charge of the 2.2uF capacitor that is
in the diagram below. That capacitor needs to be this quite high value, because
it has to pass HART signal during transmit to a resistive load of typically
250ohm. If that capacitor was switched between the channels, it may take quite
long time to settle and also may inject significant disturbance to the input
when switched. Therefore, it may be better to have that capacitor (2.2uF in the
diagram) and the bias resistors on the right-hand side (75kohm and 22kohm in
the diagram) for each channel, before the multiplexer.