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Documents AD698: Lead/lag pins
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    • AD698: 6 wire sensor connection
    • AD698: hat is the maximum junction temperature of AD698 or the maximum permissible power dissipation?
    • AD698: Lead/lag pins
    • AD698: Power supply
    • AD698: Maximum input at A and B input
    • AD698: phase lead / phase lag compensation
    • AD698 Supply Voltage versus Output Voltage
    • AD698: Power supply +/-12V
    • AD698: R3 calculation error in datasheet phase lead phase lag compensation
    • AD698 power supply current calculation
    • When powered with +/-15V the AD698 becomes hot, is this normal?
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AD698: Lead/lag pins

Q 

I have Used AD598 for many years but as the LVDT coils are not linear I have
switched to AD698 in conjunction with the data sheet. I have not fitted any
components for Lead/Lag and get not DC output Will the IC work with these open
circuit? The data sheet gives no info are this, what is the basic values if I
require no compensation? I have made provision on the board for either
configuration but have left all parts open circuit.

 

A 

The values used for the R and C of the phase compensation circuit depend
entirely on the phase shift
introduced by your LVDT, at the frequency of operation. This is not listed in
the LVDT datasheet and
should be checked using a scope to observe the inputs and outputs of the LVDT.
I can however explain
to you the reason for the phase compensation circuit and this should assist you
in choosing your values
when you have determined the phase shift.

To explain the phase compensation circuit I will refer you to the block diagram
on page 5, fig 6, of the
datasheet. If you look at both A and B channels you can see that there is a V/I
block and a comparator
block on each. In both cases what is happening is that the input sinewave is
being full wave rectified,
using the comparator to find the zero crossings of the input sinewave and using
this information to either
pass or invert the output of the V/I block. Both channels are then filtered,
using the external C2 & C3 caps
and a duty cycle based on the ratio of the amplitudes of the rectified inputs
is set up.

However, when using a series opposed LVDT the amplitude of the A channel input
reduces to zero at
the null point of the LVDT. The A channel input itself should not be used to
rectify itself as it will be
prone to errors. Because of this we include the Acomp inputs, which are taken
either directly from the
B inputs, which are constant amplitude, or which are phase adjusted versions of
the B inputs. The
phase should be adjusted such that the phase of the Acomp inputs matches that
of the A inputs. In
many cases setting the values of the phase lead/lag components does come down
to some trial and
error when initially setting up the AD698. This is simply done using a scope to
overlay the Acomp and
A channels, usually when the LVDT is at either end point, of the linear range,
not the null point. If there
is a phase difference between the channels simply adjust either one of the cap
or the resistor values
until the signal match up. Using a pot as suggested in the diagram does speed
this process up and the
pot can then be replaced by the equivalent resistor value in a final setup.

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