Question
ID: 6D2X3824SRNumber: 2E16DR01547Generic: AD5755-1Engineer: Kushwanthi PadmanabhuniStatus: Ready to PublishTitle: AD5755-1Version: 01Comments: 4/28/2016 - Kushwanthi Padmanabhuni - FAQ created.History:StatusFlag: 0Latest: YAText: 1) 1.1) The input shift register is 24bits wide. When PEC is enabled, the input register is 32 bits wide, with the last eight bits corresponding to the PEC code. When the PEC is enabled the 32 consecutive zeroes is a valid write and will update DAC A to zero scale value. 24 consecutive zeroes with the PEC is disabled is still a valid write and will update the DAC A with zero scale value. 1.2) The zero scale update refers to the accessible DAC A data register. 2) Yes, both the voltage and the current outputs are supplied by V_Boost_x . The VBoost pin supplies the positive output voltage and the current circuitry. AVss supplies the output negative voltage circuitry. You could find the quiescent current that each supply pin consumes in the table 1 in the data sheet. This table would help you understand different currents in current output mode and the voltage output mode. The current supplied by the load needs to be added to the IBoost. 3) Yes, it should be mV in the Figure 27 Digital to Analog glitch.Attachments:$UpdatedBy: CN=Kushwanthi Padmanabhuni/OU=Europe Support/O=ADI World
Inquiry Description:Hello,we have a new design with the AD5755-1 (customer request).There is a tight time frame and I would appreciate help from support for thefollowing technical questions.
(1)There will be up to 4 (four) AD5755-1 in the design.I would like to set the AD[1:0] pins at each QDAC to 00, 01, 10 and 11.The data sheet says: "It is not recommended to tie both AD1 and AD0 low when using PEC, see the Packet Error Checking section."And also "It is not recommended to tie both AD1 and AD0 low because a short low on SDIN, that is, a command of 16 zeroes, may possibly lead to azero-scale update for DAC A."
(1.1) Even without PEC, there may be 16 zeroes on SDIN as it seems. So is this really only an issue when the PEC option is being used?(1.2) Unexpected zero-scale update for DAC A: Does this only refer to the writeable DAC A Data Register value/setting? Or even to the internal DAC ARegister, i.e. to the DAC A analogue output?
(2)I will need a 5V to +/-15V on-board power supply for the AVSS and AVDD power supplies (any proven solution welcome).So I need to know the currentrequirements for these power supplies.
(2.1) Current Output ModeVBOOST supplies the output stage in Current Output Mode (as I understand).In this mode the external load current adds current to the AVCC powersupply load. An appropriate formula is given in the data sheet.Here everything seems to be clear.
(2.2) Voltage Output ModeWhat about any external load current in Voltage Output Mode?The data sheet seems to indicate that VBOOST supplies the output stage in either outputmode, i.e. in Current Output Mode and also in Voltage Output Mode.Does this mean, that the current on the AVDD and AVSS supplies does not depend onthe external load current at all?How can the output stage be supplied by VBOOST (15V) and still deliver a negative output voltage in bipolar voltageoutput mode?Which supply provides the external load current in Voltage Output Mode (AVDD? AVSS? VBOOST?)?
(3)Figure 27 Digital to Analog Glitch. Left side unit should have been stated asmV (and not V) I guess/hope?
Thank you.
Answer
1)1.1) The input shift register is 24bits wide. When PEC is enabled, the input register is 32 bits wide, with the last eight bits corresponding to thePEC code. When the PEC is enabled the 32 consecutive zeroes is a valid write and will update DAC A to zero scale value. 24 consecutive zeroes withthe PEC is disabled is still a valid write and will update the DAC A with zero scale value.
1.2) The zero scale update refers to the accessible DAC A data register.
2) Yes, both the voltage and the current outputs are supplied by V_Boost_x . The VBoost pin supplies the positive output voltage and the currentcircuitry. AVss supplies the output negative voltage circuitry.You could find the quiescent current that each supply pin consumes in the table 1 in the data sheet. This table would help you understand differentcurrents in current output mode and the voltage output mode.
The current supplied by the load needs to be added to the IBoost.
3) Yes, it should be mV in the Figure 27 Digital to Analog glitch.