The objective of this FAQ is to guide on what is the maximum clock frequency that can be used when you want to read information from the LTC2688/6.
As you can see in the LTC2688/6 timing diagram, it needs a time called t8 from the falling edge of SCK until the bit is available on the SDO output pin.
t8 conditions the maximum SCK clock frequency since the data has to be available in SDO before the next rising edge of the SCK clock signal, i.e. t4 has to be greater than t8.
For the LTC2688/6, t8 depends on the IOVcc power supply voltage level, for a power supply in the range of 2.7v to 5.25v the maximum value of t8 is 25ns and for a power supply in the range of 1.71v to 2.7v the maximum value of t8 is 60ns, therefore, if t4 has to be greater than t8, the minimum value of t4 is 25ns and 60ns for the respective power ranges, which gives a maximum SCK frequency of 20MHz and 8.33MHz for the respective power ranges.
As you can see this SCK frequency is much lower than the maximum frequency of 50MHz and is due to the time t8, so special care must be taken when interpreting the time parameters in the timing characteristics table of the datasheet.
