If the AD5413 is configured in current output mode and is driving current into a load, what happens if the loop is open?
The current output buffer will run out of head room and flag an Iout Open Circuit Error (IOUT_OC_ERR) in the Analog Diagnostic Results register.
To recover from this error condition the loop must be closed and the error bit should be cleared (W-1-C).
What is the minimum supply that will satisfy a use case of driving 20mA into max 1K load?
Max output 0.02 (Iout) x 1000(Rload) = 20V.
Headroom for IOUT is 2.3V. So IOUT + max output = 20V + 2.3V = 22.3V.
Minimum AVDD1 supply required = 24.6 V assuming a 10% tolerance
Does the SDO pin operate in tri-state?
Yes, when the SDP is not active it is in tri-state.
Do I need to add some series resistance to each voltage sense input to provide some extra protection to the AD5413?
There are 2MΩ resistors from each sense line to the VIOUT line to allow operation if the VSENSE+ or VSENSE- wires fall off. There are line protectors on the sense lines that clamp if the voltage exceeds the supply rails.
ADI recommends addition of extra series resistance for the SenseN and SenseP pins. The purpose is to enhance the Robustness of the sense pins (in particular to Surge where the on-PCB TVS may walk out > 60V). Currently 1K is a recommended number.
What capacitive load can the AD5413 drive in current output mode?
The relationship of capacitance and current with a current source is I = C * dU/dt -> dU/dt = I/C.
In current output mode, there will be no issue driving large caps (they look like a short to ground when initially connected and then charge as above)
If there is no load resistance then eventually the output driver will charge the capacitor all the way to the headroom of the current output driver and the open circuit alarm will assert.
If there is resistive load (as is usual/necessary for current output), then the output will go to Iout x Rload but only after the cap has charged to that level.
If the current is removed the capacitor discharges through the resistor.
Does the AD5413 support daisy chaining?
No, the AD5413 does not support daisy chaining.
The AD5413 integrates an internal reference. How can I configure the part to work with it? Does the part require extra circuitry? If I decide to use an external reference, do I need to reset/reconfigure the part?
The internal reference provided within the AD5413 is on at power up and no extra circuitry is needed when the reference is used as an input. Simply connect the REFOUT pin to the REFIN pin. If an external reference is preferred, simply disconnect the REFOUT from REFIN and apply the external reference to the REFIN pin. The 2.5V 10ppm/˚C internal reference can also be used to drive external loads.
Can the device output bipolar ranges from a single supply? Is it possible to supply the DAC in a way that all output ranges are covered? What is the minimum number of supplies necessary?
The AD5413 requires dual supplies to output bipolar output ranges. There is a need to account for a maximum headroom on top of the output voltage/current range when deciding on the voltage supplies to apply to the DAC.
The AD5413 can be supplied with +33V positive analog supply (AVDD1) and -33V negative analog supply (AVSS) in order to have the capability to output either of the programmable output ranges available. However, the maximum operating range between AVDD1 and AVSS is 50 V.
If unipolar voltage output is required there is a maximum AVSS voltage of -2 V that must be met for correct operation. For current output mode, AVSS can be connected to AGND.
In addition to AVDD1, a second positive analog supply (AVDD2) is required. AVDD2 can be connected to a power supply between 4.5V and 33V. In cases where low power consumption is not a concern, AVDD2 can be tied to AVDD1.
A digital supply in the range of 1.7V to 5.5V is also required to be connected to VLOGIC. In cases where low power consumption is not a concern, the output of the VLDO can be connected to VLOGIC.
Can the AD5413 drive inductive loads?
When driving inductive loads with high Q with the AD5413 , there are two measures that can be taken to reduce the ringing between the Load Cap (electric field) and the Inductive Load (magnetic field) on a current transition.
- Use the Digital Ramp Feature of the AD5413. This reduces the rate of change of current (dI/dt) on the DAC update reducing any overshot.
- Use a Snubber Network (a series resistor and a Cap). The Snubber Network is very effective in decaying away the ripple on a current step if the Inductor Q is high.