Post Go back to editing

Read is always one write behind?

Thread Summary

The user encountered an issue with the AD5254 digi-pot where reading from the RDAC was one write behind. The problem was resolved by adjusting the timing in the polling model, ensuring the RX register was read after the write operation was completed. The RDAC output now matches the expected values.
AI Generated Content
Category: Hardware
Product Number: AD5254

Hi,

I am experimenting with a AD5254 digi-pot and am finding that reading from the RDAC is always one write behind, a second read is as expected.

write 0x80 to RDAC 0.

read 0x0 from RDAC 0.

read2 0x80 from RDAC 0.

After a second write...

write 0x81 to RDAC .

read 0x80 from RDAC.

read 0x81 from RDAC.

I am interfacing with a small TI msp430 micro-controller. The logic analyzer output looks ok and appears to match the AD datasheet. I am curious if there is some timing constraints that I am missing, the throw-away-read doesn't seem like expected behavior.

Thanks in advance,

Thread Notes