LTC2758: control of CLR pin during power-up

Hi y_suzuki ,

Apologies for the delayed response. 
Upon power-up, all DACs are in unipolar 5V mode, internal DAC registers are set to 0, and DAC outputs initialize to zero volts.
The CLR pin's state doesn't affect this reset. You can keep it at low level during power up, but it should be at high level during sending instruction.

Regards,
Flynn

Hi y_suzuki ,

Apologies for the delayed response. 
Upon power-up, all DACs are in unipolar 5V mode, internal DAC registers are set to 0, and DAC outputs initialize to zero volts.
The CLR pin's state doesn't affect this reset. You can keep it at low level during power up, but it should be at high level during sending instruction.

Regards,
Flynn