Hi,
Now I am evaluating AD5542A.
I checked SPI waveform as following and DAC might be updated before ~LDAC is low.
I guess Timing diagram meet requirement.
Is there any way to update DAC correctly?
Hi Flynn,
Thank you for your comment.
First of all I made mistake to describe part no, AD5541A (10pin package) is correct.
I check situation when value is changed as 0xFFFF -> 0x00FF -> 0xFFFF -> 0x7FFF.
~LDAC is supplied
~LDAC is tied to GND
DAC voltage is correct but updated before ~LDAC.
Both of them is updated almost 3clk before CS is high.
Hi Flynn,
Thank you for your comment.
First of all I made mistake to describe part no, AD5541A (10pin package) is correct.
I check situation when value is changed as 0xFFFF -> 0x00FF -> 0xFFFF -> 0x7FFF.
~LDAC is supplied
~LDAC is tied to GND
DAC voltage is correct but updated before ~LDAC.
Both of them is updated almost 3clk before CS is high.
