AD5542A DAC might be updated before ~LDAC

Hi Barbatos ,
If /LDAC pin is tied low, does the DAC update correctly?
With /LDAC low pulse or tied low, have you tried sending other DAC value (e.g. midscale)? Is the DAC output as expected?
If it works as expected, then we can isolate the issue primarily to the asynchronous update via /LDAC.
What is /CLR pin's condition? Can we know your other inputs' conditions?

Regards,
Flynn 

Hi Flynn,

Thank you for your comment.

First of all I made mistake to describe part no, AD5541A (10pin package) is correct.

I check situation when value is changed as 0xFFFF -> 0x00FF -> 0xFFFF -> 0x7FFF.

~LDAC is supplied

~LDAC is tied to GND

DAC voltage is correct but updated before ~LDAC.

Both of them is updated almost 3clk before CS is high.