Dual Potentiometer required 9 bit data string. First bit designates which of the trimpots to adjust. Other 8 bits encode the 255 bit latches on end of chip select.
This is being done using two 8 bit strings and clocking them to the trimpot. The first 8 bit word is all zero until the last bit which is used as the selection bit. Then a second 8 bit word is being clocked to the trimpot to set the trimpot level.
The first 8 bit word works perfectly and the two trimpots can be accessed as desired.
The second 8 bit word does not work at all. For example, a 2v - p-p sinewave applied to the input of either trim pot indeed allows virtually no attenuation when the address is set at 255.
BUT, when 128 is set into the word instead of dividing by 2 (within a minor error) the output is 0.5v - p-p - A DIVISION OF APPROX. 4. Successive divide by 2s yield non-linear and unexplained results.
A four channel WaveRunner scope shows all bits correctly set the MOSI to the trimpot and the SCLK signals are correctly configured.
This makes no sense. Is there something we are missing in this interface ensure it works? Help Please.
