AD5592R three-state on channel 0 causing ADC channel reads corruption

I am running the SPI clock at 400 kHz which I was increased to 1 MHz however increasing the clock did not resolve the issue. Still channel 0 tri-state corrupts other ADC samplings.

I set following registers in the order.

1). SW Reset

2). Tri-state config

3). ADC config

4). ADC Sequence

5) NOPs to get ADC samples...

back to point 1).

Scenario 4: Here I am setting channels 3,4, 5 as ADC and channel 1 as Three-state - ADC sampling working perfectly.

Please note: Bitscope logic analyzer shows endianness incorrectly . Here MOSI is with correct endianness and MISO is inverted, next image shows MOSI with incorrect endianness and MISO with correct endianness)

Scenario 5: I am setting channels 3,4, 5 as ADC and channel 0 as Three-state - and now ADC sampling PROBLEM !

This kind of a proof that the software code setting the registers are correct and the AD5592 acts differently when channel 0 is in Three-state.

Appreciate your help to understand the issue here.

Hi lasa ,

We're currently taking a look at this query and will get back to you soon. Thanks for your patience.

Best Regards,

Den

Hello Iasa,

We have not been able to reproduce the issue you are facing.

Please provide me the following details.

1. Entire circuit diagram and the test conditions.

2. Are you using an external reference? If yes, of what value?

3. Entire register sequence after power up, including the /SYNC high period and the SCK frequency.

Regards,

Vikash

Hi there,

I'm a colleague of lasa and was asked to independently verify the issue using MicroPython with different microcontroller hardware to see if the issue was still present with a different configuration. It does indeed appear to be!

I used a Seeed Studio XIAO (Raspberry Pi RP2040) connected to an EVAL-AD5592R-PMDZ. 3V3 and GND were connected to the micro, SPI was connected as you'd expect (ie four pins connected to the micro), RESET was pulled high and, for purposes of testing, CH3 was connected to 3V3, CH4 to GND and all other channels left floating. I can supply photos or more detail on the connection if necessary. No external reference. SPI was configured to 20MHz though, due to clock configuration on the RP2040, the actual value was closer to 15MHz. I can supply DSO images if necessary but this is easily reproducible. 

See below for a series of steps, similar to lasa 's: 

• SW reset
• Display all registers
• Configure CH3, 4, 5 for ADC use
• Display all registers
• Retrieve data (x3): Data is as expected and consistent
• Set CH0 as tri-state
• Retrieve data: Unexpected result
• Clear CH0 as tri-state
• Retrieve data: Data is as expected
• Set CH0 as tri-state
• Retrieve data: Unexpected result

>>> send(spi, cs, 0b0_1111_10110101100) # SW reset
>>> print_all_registers(spi, cs)
NOP                   0b0000 0b0000000000000000
DAC_RD                0b0001 0b0000000000000000
ADC_SEQ               0b0010 0b0000000000000000
GEN_CTRL_REG          0b0011 0b0000000000000000
ADC_CONFIG            0b0100 0b0000000000000000
DAC_CONFIG            0b0101 0b0000000000000000
PULLDWN_CONFIG        0b0110 0b0000000011111111
GPIO_CONFIG           0b1000 0b0000000000000000
GPIO_OUTPUT           0b1001 0b0000000000000000
GPIO_INPUT            0b1010 0b0000000000000000
PD_REF_CTRL           0b1011 0b0000000000000000
GPIO_OPENDRAIN_CONFIG 0b1100 0b0000000000000000
>>> send(spi, cs, 0b0_0100_000_00111000) # Set IO 3, 4, 5 as ADC
>>> print_all_registers(spi, cs)
NOP                   0b0000 0b0000000000000000
DAC_RD                0b0001 0b0000000000000000
ADC_SEQ               0b0010 0b0000000000000000
GEN_CTRL_REG          0b0011 0b0000000000000000
ADC_CONFIG            0b0100 0b0000000000111000
DAC_CONFIG            0b0101 0b0000000000000000
PULLDWN_CONFIG        0b0110 0b0000000011000111
GPIO_CONFIG           0b1000 0b0000000000000000
GPIO_OUTPUT           0b1001 0b0000000000000000
GPIO_INPUT            0b1010 0b0000000000000000
PD_REF_CTRL           0b1011 0b0000000000000000
GPIO_OPENDRAIN_CONFIG 0b1100 0b0000000000000000
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
[(3, 4095), (4, 5), (5, 0)]
>>> # 3 is 3V3, 4 is GND and 5 is floating
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
[(3, 4095), (4, 10), (5, 0)]
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
[(3, 4095), (4, 10), (5, 0)]
>>> send(spi, cs, 0b0_1101_000_00000001) # Set IO 0 as tri-state
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
[(5, 0), (5, 0), (0, 0)]
>>> send(spi, cs, 0b0_1101_000_00000000) # Clear all tri-state channels
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
[(3, 4095), (4, 9), (5, 0)]
>>> send(spi, cs, 0b0_1101_000_00000010) # Set IO 1 as tri-state
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
[(3, 4095), (4, 10), (5, 0)]
>>> send(spi, cs, 0b0_1101_000_00000001) # Set IO 0 as tri-state, clear ID 1
>>> get_adc_values(spi, cs, 0b00111000) # Get data for the channels
0b1000000111000
[(5, 0), (5, 0), (0, 0)]

The MicroPython code to interact with the AD5592r can be found in this gist. This should be easily transferrable to any microcontroller supported by MicroPython; let me know if you would like assistance setting up such a system. 

Hope that helps!
Matt

vsethia Just wondering whether we have any update on this issue. It seems that so far we have managed to recreate the issue with 2 different approaches. Appreciate your assistance.

dendalisay vsethia Appreciate if we could get some help on this issue. Please let me know if you need further information.

Hi Iasa,

Regarding the steps that you are going through, you need to add one additional configuration

1). SW Reset

2)  GPIO config on the channels you wish to tristate.

3). Tri-state config

4). ADC config

5). ADC Sequence

6) NOPs to get ADC samples...

Hi Matt,

Sorry for the late response. For your case, you should add additional steps.

• SW reset
• Display all registers
• Configure CH3, 4, 5 for ADC use
• Display all registers
• Retrieve data (x3): Data is as expected and consistent
• Set CH0 as GPIO and then tri-state
• Set ADC sequencer
• Retrieve  ADC data: 

Any channels to be configured for push pull/ open drain/tristate/pull down must first be configured as GPIO.