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DAC DNL Issue

Category: Hardware
Product Number: AD5781

The DNL of the AD5781 is specified as +/- 0.5lsb. I am seeing DNL values greater than 1. The only signature that seems to show up is that these are occurring at 2^N boundaries (not all the time, just some of the time). Do you have any ideas as to what is causing this.

My Setup is as follows. Any suggestions would be appreciated

Parents
  • Hi  

    One comment on your setup, I don't see any 10uF on the supply rails. I suggest we have those in the vicinity of the DAC and buffers. Other than that your setup looks good. 

    It is possible that the peak values appear on the boundaries and linearity specs like DNL are guaranteed by ADI in production and the values even have some guard band to assure that the actual performance doesn't exceed the max spec.

    How do you measure and calculate your DNL? Have you removed the offset and gain errors on your data points? What DMM are you using?

    And are you using AD5781? the schematic shows AD5791 so just to be clear. 

    Best regards,

    Ian

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  • Hi  

    One comment on your setup, I don't see any 10uF on the supply rails. I suggest we have those in the vicinity of the DAC and buffers. Other than that your setup looks good. 

    It is possible that the peak values appear on the boundaries and linearity specs like DNL are guaranteed by ADI in production and the values even have some guard band to assure that the actual performance doesn't exceed the max spec.

    How do you measure and calculate your DNL? Have you removed the offset and gain errors on your data points? What DMM are you using?

    And are you using AD5781? the schematic shows AD5791 so just to be clear. 

    Best regards,

    Ian

Children
  • Hi Ian,

    Thanks for looking at this.

    Yes, currently I am using a 5781. I hope to graduate to 5791 once I figure this out.

    I am using a a Tektronik 3700A DMM. My DNL calculation is as follows:

    LSB size = 20/(2^18)

    DNL(n) = [(V(n) - V(n-1))/LSB_SIZE] - 1

    I am seeing DNL values as high as 7.

    By removing gain and offset are you referring to the DMM?

    Another thing to note is that I am using an opamp that is NOT the same as the reference circuitry.

    It is still a low noise opamp but maybe that has something to do with it. If it does, I would REALLY like to understand what about this opamp is non-ideal for this DAC.

  • Hi  

    Your DNL formula is correct. I think the problem lies with the LSB size calculation. It is impractical to assume 20 fsr. We have to consider the DAC response is affected by the real reference errors. plus, DACs as well as amplifiers have deadbands and errors at the endpoints, offset and gain errors, which makes the ideal LSB size very impractical in presenting the DAC's performance. 

    LSB size = 20/(2^18)

    DNL(n) = [(V(n) - V(n-1))/LSB_SIZE] - 1

    The best way to represent the DAC response is by doing calculations not at the exact endpoints (zero code and full-scale code) but at the practical endpoints where the response is linear. A good starting point would be code 256 to 2^n-256 for 16-bit DACs and above (see p7 footnote of AD5672R/AD5676R ). These codes could sometimes be found in product datasheets. Can't find the exact code range for the AD5781/91.

    The practical LSB size formula would then be: 

    LSB size = [V(2^n -256) - V(256)]/ (2^n - 512)

    In terms of your amplifier used, it should be fine as long as the offset errors and noise does not dominate the DAC's.

    Best regards,

    Ian

  • Hi Ian,

    I will try and repeat the calculations as suggested but I don't think they will correct a DNL of 7.0.

    I did the noise calculation using LTSPICE and that seems ok.

    How do I figure the impact of the opamp offset on a R/2R DAC?

  • I re-did the calculation and there was hardly any change to the lsb size or the DNL results,

  • LSB size = [V(2^n -256) - V(256)]/ (2^n - 512)

    Sorry, Did you use the actual V measure at the codes? We're trying to get the real LSB size and not use calculated ideal. 

  • Yes. I used the actual measured values. I replaced the DAC IC with another one and the same codes exhibited the non linearities. This leads me the believe that the problem lies with reference opamps. It would be great if there was some literature that explains what about the opamps causes this. 

    In my particular case the non linearities seem to be happening when the lowest nibble transitions from 0x7 to 0x8. 

  • I'll check with my colleagues and see what more we can look into to validate the DNL testing and give some guidance on the opamp selection. In the mean time, we could try adjusting the codes, I remember some 16-bit DACs were tested at code 1024 from zero and full-scale. We could try with 2048 or 4096. Also, what is your DMM setting? no. of samples, sampling freq? 

  • It is a DC measurement so no sampling frequency specified. The standard deviation of the DMM measurement is 3uV. So it is much smaller than the DAC lsb size.

  • I meant here the averaging count on the DMM for each data point. Depending on the product it could go from 10 to 500 samples per step. 

  • Hi Ian,

    It's been a while. I think that the DNL discrepancies are happening when the R-2R impedance changes and the reference opamp is not able to maintain the vref properly due to the impedance change. Can you reach out to your designers and ask what about the opamp would cause that to happen? For example, does the offset voltage of the opamp change based on the load current?