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AD5754-SPI read

Category: Hardware
Product Number: AD5754
Software Version: FPGA

Hello~

  I'm using AD5754 DAC with FPGA.

  The initial status is that DVCC is 3.3V, ADVV is 2.5V ,AVSS is 0.5V ;After the FPGA is power-up,ADVV becomes 7V ,AVSS becomes -7V.LDAC, CLR, SYNC and BIN2COM are tied to 3.3V.

  The frequency of SCLK is 5M.The SPI write registers are following:0x10_000F(to power up DAC A,B,C and D) ;0x0C_0003 (to set output range +/-5V) ;0x04_FFFF(to set 4 channel DAC  register value  0xFFFF).

  Problem:There is no output of 4 channel DAC output.So I test the SPI communication .I  wrote 0x10_000F to power up DAC A,B,C and D .Then I tried to read it back .I set register 0x90_0000 for read and after that I set NOP command 0x18_0000 to get read back data .Howerer, the read back data I got is 0x00_0000.

  I tried to read other register ,the result is that I can not get the data that I used to write. So what should I do when encountering the above problems。

Write 0x10_000F.(CS_N is pin7  SYNC )

Write 0x90_0000.

Write 0x18_0000.(The data read back from SDO is 0x00_0000)



update
[edited by: dingpeng at 1:21 AM (GMT -4) on 11 Aug 2023]
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  • Hi  

    Looking at your waveforms, there seems to be a timing issue. The AD5754R input shift register samples data at the falling edge, and so setup time or transition of data should be set on the rising edge of your sclk. 

    One more thing is to check if you are using an external reference or the internal reference of the DAC? the internal reference is off by default and you need a power-up command to enable it if needed.

    And I want to clarify that during normal operation, AVDD =7V and AVSS = -7V, right?

    Best regards,

    Ian

Reply
  • Hi  

    Looking at your waveforms, there seems to be a timing issue. The AD5754R input shift register samples data at the falling edge, and so setup time or transition of data should be set on the rising edge of your sclk. 

    One more thing is to check if you are using an external reference or the internal reference of the DAC? the internal reference is off by default and you need a power-up command to enable it if needed.

    And I want to clarify that during normal operation, AVDD =7V and AVSS = -7V, right?

    Best regards,

    Ian

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