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What is the Clock input, and System clock in ADIsimDDS (Direct Digital Synthesis)?

Category: Datasheet/Specs
Product Number: AD5932
Software Version: https://tools.analog.com/en/simdds/?fc=25M&harmonicDB=-70&mult=1&part=AD5932&rso=111111&sclock=50M&tof=1.1M&useFilters=0

Hi everybody

In Web Simulator ADIsimDDS (Direct Digital Synthesis)

tools.analog.com/.../

1th Question :

What is the Clock input, and System clock?

In datasheet, I con't find this name (datasheet, MT-085, AN-1044..)

2nd Question : 

I will use this chip to make a square wave. I made a square wave in this web simulator. 

But "Errors and Warnings" have occurred. Is there any way to make a square wave without "Errors and Warnings"?

Errors and Warnings :
Warning: There are images and/or harmonics at frequency locations that are very close to the fundamental signal. These spurs may be difficult to see on plot (zooming may be required), but they will adversely affect output signal.

Thanks!

  • Hi  ,

    Our expert   is currently checking this query. Thanks

    Best Regards,

    Den

  • The DDS simulator is common for many products, therefore the term system clock is not shown in all datasheets. It refers to the signal driving the phase accumulator. Some products have dividers or PLL-based multipliers, therefore the difference made between the external clock and the internal clock.

    In this particular case, with 16 MHz clock and 4 MHz target frequency, the sinusoidal output looks like a square wave because there are only 4 samples per cycle. However, the signal may look differently depending on the initial phase of the accumulator.

    The warning should be ignored because these are applicable for sinewaves where the goal is achieving high spectral purity with appropriate filtering, and this is difficult when the tone is close to Nyquist frequency.

    The correct way to generate a square signal is using the MSBOUT pin. This pin outputs the MSB of the sinewave, However, the granularity of the square wave is one MCLK period, so this method is suitable for low frequency signals only. When the output frequency is close to MCLK frequency, the duty cycle changes from cycle to cycle producing high jitter.

    There is another method to produce a square wave using a comparator on a filtered sinewave. This method is suitable for high frequency when the number of samples per cycle is low. It is available in other DDS circuits such as AD9834.