There are a couple of mistakes in the datasheet Rev. F
The description of the read operation:
- I assume there is missing some explanation about the read operation which says:
The question arising from this description is how does the AD5669R know which registers to read and send to the host if there is only given one address byte which only identify the device?
I assume the mistake is that the second byte is sent from the host to ad5669 with register selection information and not as described above. If this is true then the figure annotation of the acknowledge of the second byte is incorrect on page 23 figure 52. clock cycle 9+9=18 incorrectly states ack by master must be ack by AD56...
I hope someone can clarify this.
Finally a minor thing:
Page 26, 27, and 28
The serial shift register is 24bit not 32bit: Page 26 table 11. Page 27 table 13 and 14. Page 28 table 17 incorrectly states that it is 32 bit.
clarifications and typo
[edited by: larsen at 9:42 PM (GMT -5) on 6 Mar 2023]
