About AD5660 SPI Communication

Question

About AD5660 SPI Communication 
 The datasheet states that data should be sent in 24bit. After sending 24bit data, I used it to raise the SYNC pin (finish communication) after inserting the setting memo contents for 8bit without raising the SYNC pin. 
 Then the DAC output fluctuated slightly, I thought that it was shifted by 8 bits because it was a shift register, It was less than 1mV, so it wasn't. 
 By sending 8 bits without raising the SYNC pin after sending 24 bits of data, Is it possible to affect internal registers (such as DAC undisclosed setting parameters)? 
 Sorry for the normal operation question, but it would be helpful if you could give me advice

EZAutoReply · Accepted Answer

Hi UBOTI 
 Apologies for the late response. I can't confirm this without having to look at the digital core of the device. What the datasheet states are that the data sent to the DAC will only be applied on the 24th falling clock edge. Another event that could cause the fluctuation in the output is digital feedthrough. 
 What you noticed is it only a fluctuation or a dc change in the output level? are you able to insert a substantial delay after sending the first 8 bits before proceeding with the rest of the data? 
 Best regards, 
 Ian)

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About AD5660 SPI Communication