According to the datasheet of AD5124 we can believe that VDD pin is for biasing "potentiometer staff".
Given that I need to generate voltages in the range -5V ... 0V, can I bias AD5124 in the following way:
- VDD connect to ground
- GND connect to ground
- VSS connect to -5V
- VLOGIC connect to +5V (or 3.3V)