About AD5246 crosstalk

Hi Knj,

Does the undershoot happens on the SDA line or on the output line? Can i request for a waveform?

Sometimes, undershoots are caused by improper probing. I recommend to try to place your probe and ground near the AD5246.

Best Regards,

Yokki

thank you for your reply.

I will attach the waveform.

PDF

There is an undershoot from SDA before issuing Ack when reading data. About -0.4V
At that time, there is a big crosstalk in the red circle in the attached document on SCL. About -0.6V
Undershoot and crosstalk of about -0.2 to -0.1V can be seen in other places as well.
It is difficult to satisfy the maximum rating with GND, and can it be relaxed to the standard I2C standard of -0.5V?

I would be grateful if you could reply.

Best Regards,
Knj

How about this matter?
I would be grateful if you could reply.

Best Regards,
Knj

Hi Knj,

The lowest voltage possible in the digital lines is -0.3V. Kindly make sure that you are above -0.3V. What is the value of your pull-up resistor? I assume that your Vlogic or pull-up voltage is 3.3V. Use shorter ground lead when measuring. How many type of devices are sharing the I2C bus line? lastly, have you measured near the controller and saw the same results?

Best Regards,
Yokki

Thank you for your reply.

Regarding the voltage of the signal line, it is usually -0.3V or higher, but when undershoot crosstalk occurs, it becomes -0.3V or lower.

The pull-up resistor is 2.2kΩ for SDA.
SCL is pulled up with 10kΩ after buffer output of TC7SZ125FU.
The pull-up voltage is 3.3 V.

The ground wire at the time of measurement is made as short as possible, but there is not much difference in crosstalk.
Geodesy is a passive probe and does not use a FET probe.
I'm looking at the pattern closest to the IC terminal, but it's not even 1 cm away from the terminal.
There are three types of devices that share an I2C bus line.

The SDA on the controller side has less undershoot due to the damping effect, and the low level is 0V or higher, which is divided by damping and pull-up.

I would like to reduce SCL crosstalk by changing damping etc. to slow down SDA, but the steep undershoot of the SDA signal at the time of switching before Ack is output from the device does not change.

Best Regards,
Knj

How about this matter?
Is there any design problem?

Best Regards,
Knj

Hi Knj,

Can i ask for the actual schematic around the I2C lines with the buffer included? Is there any specific purpose why you used a buffer on SCL? Have you tried to increase SDA pull-up resistor value to 10k same with SCL? This will increase rise and fall time which can help avoid undershoots. See if this helps. Thanks!

Best Regards,
Yokki 

Hi Yokki,

Thank you for your reply.

I changed the SDA pull-up resistor to 10kΩ, but although it improved, it exceeded 0V.

PDF

I would like to share the peripheral circuit diagram, but is it possible to exchange it individually?

I would appreciate it if you could reply.

Best Regards,
Knj

Hi,

Discussion now taken offline. Thanks!

Best Regards,
Yokki