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ADFS5758 connectivity

Category: Hardware
Product Number: ADFS5758
Software Version: N.A

Hello,

1) When using the ADFS5758 with +15V / -12V supply, can I use the device in 0-10V output? What will be the voltage resolution? Will it be 10V/2^16 ?

2) When using the ADFS5758 with +15V / -12V supply, can I use the device in -10  to 10V output? I understand from the datasheet that the headroom should be 2.5V, but will 2V be sufficient?

3)  When not using the integrated buck dc-to-dc converter , should the AVDD1 be connected? What is the correct connection when not using the integrated buck dc-to-dc converter?

4) What digital signal should be used as chip select for the SPI? (I have multiple SPI devices, and each one should have EN pin)

5) The datasheet states that REFOUT shouldn't be decoupled with capacitor to REFGND. But at the eval board there is an optional 2.2uF capacitor between REFOUT and REFGND. 

    What is the situation at which this capacitor should be placed? Shouldn't REFOUT have a decoupling capacitor for stability?

Best regards,

Asaf

  • Hi Asaf,

    1) Yes, the resolution will be 10V/2^16.

    2) The footroom (minimum voltage for AVSS, -10 V output case) for voltage output is actually 2 V (See page 6 of the ADFS5758 datasheet), so - 12 V AVSS supply is ok for - 10 V output. 

    3)  AVDD1 should be connected directly to VDPC+. SW+ can be left floating. 

    4)  The digital signal should be the same voltage level as VLOGIC on the ADFS5758. The CS signal is an active low signal. 

    5) The recommendation is that no capacitor is required on REFOUT. The internal amplifier does not need it for stability. 

    Regards,

    Valerie

  • Hello Valerie,

    Thanks you for the fast reply.

    1) It is still not clear to me - which pin at the ADSF5758 can be used as chip select? None of the pins, as far as I can understand, has this function.

    2) About the footroom, can you please explain what is stated at page 16: "For a unipolar voltage output, AVSS (maximum) is −2.5 V." Does it mean that more than -2.5V is not needed for 0V output?

    Also, in order to have 0V output, can the AVSS be connected to GND, or should be be connected to -2V?

    3) Can I connect the AVSS to -12V for 0-10V output?

    4) Which pin at the adsf5758 can be used as CLR signal? Meaning, that the output is asserted to 0V / 0mA?

    I refer mainly to the startup, at which we don't want any unknown state at the output.

    5) About the REFOUT - since at the EVAL board there is an optional 2.2uF capacitor on REFOUT, I wanted to know at which situation should it be assembled? 

    Best regards,

    Asaf Abraham

  • Hi Asaf,

    1) Pin 21 SYNC pin is used as the chip select signal.

    2) That is an error in that section of the datasheet, please refer to table 1 for the correct specification. 

    3) Yes

    4) The ADFS5758 does not have a clear pin. The DAC output registers default to zero on power up. There is also an output enable bit DAC Config Register (0x06) that on power up is disabled. A write to this bit must be performed before the output becomes active.

    5) The capacitor is not required and does not need to be assembled on the evaluation board. 

    Regards

    Valerie

  • Hi Valerie,

    Thank you for the answers. They were very helpful.

    Since I do need a CLR function, can the RESET pin used for this purpose? 

    Best regards,

    Asaf

  • Hi Asaf,

    Yes, we recommend performing a reset after power up, the RESET pin can be used for this.

    Valerie