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AD5622 Unexpected Output Voltages

We have a product in which AD5621 was designed.  We cannot buy AD5621 at this time, and need to replenish our product stock.  I found AD5622 in distribution, and bought 10 of them

for a trial in our product before committing to manufacture.  I wrote some code which I believe is behaving correctly.   I am using the address pin as a "chip_select" with the I2C format.

I'm able to write values to AD5622 and read back the same values written, with the two-bit shift as indicated in the data sheet.  This is done by first writing the address pin to 0, then using "11" as the address field in the first byte of the 3-byte transaction.  The other 3 AD5622s in the system have their address pin written to 1 during the transaction to the selected AD5622.

The values "1e" "05" "55" are written to the device.  If my understanding is correct, this should result in a 1.1 volt output.  The measured output is 1.179 volts.

The values "1e" "00" "00" are written to the device.   This should result in a 0 volt output.  The Measured output is roughly 1 volt.

The values "1e" "0A" "0A" are written to the device.   This should result in a 0 volt output.  The Measured output is roughly 1.5 volt.

Can anyone help me with this ?  I thank you for your kindness and your valuable time.

Parents
  • Hi, 

    First would like to clarify that you are able to read back the correct commands sent to the device? ie the codes that result mentioned above. If so it means that your digital comm should have no problems. 

    I'm assuming you're using 3.3V VDD, correct? 

    What's the load on the DAC Output? How much current are you drawing from it during your test? Can you do a probe check on your VDD when you write the codes? The output is greatly dependent on VDD, so a slight change can cause changes on the output for your first code. 

    Best regards,

    Ian

Reply
  • Hi, 

    First would like to clarify that you are able to read back the correct commands sent to the device? ie the codes that result mentioned above. If so it means that your digital comm should have no problems. 

    I'm assuming you're using 3.3V VDD, correct? 

    What's the load on the DAC Output? How much current are you drawing from it during your test? Can you do a probe check on your VDD when you write the codes? The output is greatly dependent on VDD, so a slight change can cause changes on the output for your first code. 

    Best regards,

    Ian

Children
  • Yes, that is correct, I am able to read back the value written, and the bitstream on the oscilloscope is agreeing.  The protocol looks entirely correct if I compare it to the data sheet.  The devices send the acknowledge as expected.

    The Vdd looks a little noisier than I would like it, some of that may be due to a long ground lead on the probe.  Another board in which there is no ground test point   Slight smile  I don't see any transients on it when I write the chip.  There's a bypass cap right beside all 4 of them.

    The load on 3 of the 4 devices is an open circuit, the fourth is driving > 20k.  

    Yes, Vdd is 3.3 volts.

    Having found nothing wrong with my code, and the chips were getting same value written, I decided I must have bad chips in two instances. 

    I was right. Changing the chips solved the problem.  The only thing I can think of is maybe they were damaged when installed, it was a board built by hand.

    It's odd that the failure mode would be identical.  There must be a common stimulus.  However, I just don't know what it was.

    There's another board to test yet.

    Thanks for your generosity to reply and your suggestions were all relevant.