Tolerance problem of ADN2850

Moved from FPGA ref designs

Laszlo

Please read the section " Calculating Actual End-to-End Terminal Resistance " in DS to compute the actual resistance and setting the wiper to the correct position. 

How are you measuring the resistance. Do note that measuring the resistance directly using DMM will always lead to measurement errors.

Yes i will check End- to End Terminal Resistance .

also we are directly measuring resistance across W1 and B1 using DMM.

Is there any other ways to measure it?. I mean we have to make any hardware setups?.

Thank you  for your information

Sujit Sadalagi.

You can inject two different currents in order of 100s of uA into one terminal, keeping other terminal to ground or any other potential and measure the voltage between the terminals. In this case, simply compute delta V / delta I.

Other option is to add a resistor in series to one end of the terminal  use a operational amplifier at one terminal, keeping other terminal to a fixed potential and the external resistor at another potential, and measure the voltage at the amplifier output. In this case, measure the ratiometric value of the resistor divider and compute back the digipot resistance.

Ok 

Thank you for your quick response.

Regards,

Sujit Sadalagi.