AD5593R VLogic and VDD range dependency is not clear in the datasheet.


VLogic range is stated "1.8V to VDD" in the Power Requirements section but it is stated "1.8V to 5.5V" in other places and "-0.3V to 7V" in the Absolute Maximum Ratings.

Is it really VLogic must be lower voltage than VDD?

What I really want to ask is;

When the VLogic is continuously 5V and VDD (VDD is normally 5V) is disconnected, will the chip be damaged or is it safe?

If it is safe what will be the DAC output pin status?  Hi-Z ?