If I set the AD5292 into the high impedance mode (0x8001, followed by 0x0000), how do I get it back to normal mode?
Ok, then how does this work with 16 devices in a daisy chain?
Would I then have to send 16 single NOP commands?
The first NOP would awake the first device in the chain.
Then the second NOP would awake the second device in the chain because after the first NOP the second device would receive the first NOP, which is now stored in the shift register of the first device and is being clocked out of the first device into the second device because the SDO of the first device is now active. And so on...
Would this method work?
Any other (quicker) method possible?
Ok, then I would need a command that does nothing but wakes the SDO pin up.
Like command 8 from table 11 with D0 set to 0?
I assume a terminated command (_SYNC going high after non-multiple-of-16 clock cycles) doesn't wake SDO up either?
And what happens if an AD5292 receives an all 1 command? Because if the IC before it in the chain has a disabled SDO, the DIN will be high for all 16 clock cycles.
While I am still interested in the answers to above questions...
In high-impedance-mode, the SDO behaves no different than if the IC was active in a normal mode, but the logic signal active on the SDO pin was just high (1), right?
What if I set DIN to 1 and put 257 clock cycles on CLK and then raise _SYNC?
As 257 is no multiple of 16, the ICs would discard the command and because of more than 256 ones having been clocked into the daisy chain, the SDOs of all ICs will be at logic 1, effectively drawing quasi zero current. Correct?