When the AD5292 has no supply voltage applied, I assume that all analog switches are off and so the A, B and W terminals are disconnected.
While the datasheet says that "after VLOGIC is powered, the power-on preset activates, restoring the 20-TP memory value to the RDAC register.", wouldn't that require reading the 20-TP memory, which requires the high voltage on the VEXT_CAP pin, which is drawn from VDD.
So if VDD is still down, would that mean that VDD must be up in order for the terminals are connected to the internal resistor strings?
Would the power-up cycle then only start when VDD reaches a certain voltage?
And how about when the switches are being actually connected? Would that happen at some VDD-VSS threshold value? or would they be connected directly after the power-up and then only become lower-ohmic with the further rising supply voltage?