I am very happy to be here.
I am a student doing a small DAC project, and am looking at AD5791. I am a bit confused about what the max SCLK frequency.
I have attached the data sheet.
On the first page under 'Features' I read:
35 MHz Schmitt triggered digital interface
On page 5 under the timing characteristics table I read:
Maximum SCLK frequency is 35 MHz for write mode and 16 MHz for readback and daisy-chain modes.
So far so good. Here is my problem:
On page 20 in the description of the 'input Shift Register' I read:
Data is loaded into the device MSB first as a 24-bit word under the control of a serial clock input, SCLK, which can operate at up to 50 MHz.
Now, I understand that it only can operate @ 16 MHz in readback and daisychain mode. But what I dont understand, when/where does the 50 MHz come in the picture?
Thank you very much