Although the part has not been configured to the desired output range yet, does it work with the default +5V range? Can you configure the rest of the registers and get the expected output voltages when you write a data to it? Is /LDAC tied permanently low, or is it held high during the write cycle and brought low to update the DAC registers?
You could be facing a timing issue, so a scop plot of the /SYNC, SCLK, /LDAC, SDIN lines would be useful to assure that the interface timings match with the datasheet.
Although the part has not been configured to the desired output range yet, does it work with the default +5V range? Can you configure the rest of the registers and get the expected output voltages when you write a data to it? Is /LDAC tied permanently low, or is it held high during the write cycle and brought low to update the DAC registers?
You could be facing a timing issue, so a scop plot of the /SYNC, SCLK, /LDAC, SDIN lines would be useful to assure that the interface timings match with the datasheet.
