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Puzzling behaviour od AD5336

Hi Guys,

I'm driving an AD5336 and my test code steps from 0 to 1023, then repeats until I stop it.

The chip has a 3V3 supply and all of the Vref pins are at 3V0. LDAC and GAIN are both 0V and PD is at 3V3. Outputs are presently not disconnected to preclude any external influence.

The puzzle is that, rather than rising 0V to 3V0 over the count as I expect, it ramps from 0V to 2V5 over the data range 0..~350, then stops rising.

I can see all the data changing as I expect and even if I had bits swapped or stuck, I would not see the steady ramp to 2V5.

I've replaced the chip, but still get the same behaviour.

Can anyone shed any light on this, please?

Thanks.

Message was edited by: Gordon Scott (correction .. strikeout of inadvertant 'not')

  • Hi Scott,

    Have you checked the digital signals with a logic analyzer/scope?


    Regards,

    Padraic

  • Hi Padraic,

    I've checked them with an oscilloscope, I don't have a logic analyzer.

    As far as I can see, they all toggle at rates that look like the right binary pattern, e.g., every data line is toggling at half the rate of the one below it. The output also sweeps fairly linear from 0 to 2V5 as I would expect, though there's a slightly soft 'knee' at 2V5, which may be offering a clue.

    Part of the puzzle is that if the data was wrong, I'd expect to see strange patterns over the whole range, but I don't. It rises evenly from 0 to 350, then stops rising, and the voltage at 350 is more than the Volt or so (3V*350/1024) that one would expect. I'm very puzzled. :-/

    Gordon.

    Update:

    I've tried some more patterns, in particular two walking bit patterns. Looking at the data on the DAC pins, the bits are walking as I expect.

    0x200->0x100->0x80->0x40 etc. gives a stepped pattern much as one would expect, except that as with the earlier '350' observation, it suddenly compresses at 2.5V (well, it looks like 2.4V actually)

    The inverted version of that data just gives 2.4V solid.

    Images attached of the former at two magnifications. The image of the latter is very boring :-)

    The second image has shifted left because the triggering gets confused.

    Message was edited by: Gordon Scott adding update text and images.

    (It's of no significance, but obviously my oscilloscope is in someone else's time zone. It's only 10am here.)

  • Hi Scott,

    Why is the image inverted? Is there is an amplifier on the output path that might be causing the clamping? It could be clamping from this amplifier(offset errors).


    If possible could you share the DAC output an connected circuitry and detals of where you are probing to get the images above.

    Regards,

    Padraic

  • Hi Padraic,

    I think the image isn't inverted, I'll explain more. If after that you still think it's inverted, then that is likely a clue.

    The upper image shows all output levels with the data stepping 0x200, 0x100, 0x080, 0x40, etc. So I would expect to see analogue levels of 1.5V, 0.75V, 0.375V and so on. Withe hindsight I should also have used 0x3FF to show fsd, but I was checking the individual data bits were working.That said, I'm confident it would just have widened the first level, not been any higher.

    There is nothing connected to the outputs. Sorry, in my original post I'm intended to change "not connected" to disconnected, and ended up with "not disconnected", which was incorrect. I corrected that a short while ago, but probably too late for you to notice the correction. They're disconnected partly because I suspected an external effect and partly because I had previously had a 100R/1nF lowpass, whcih caused the DAC to oscillate.  They are all now removed and, whilst I doubted the DAC was harmed I also replaced that. Old and new DAC both show the same behaviour.

    The pin I was looking at was p5 (VoutA), but all four do the same thing.

  • Hi Scott,

    Did you monitor the refrence when this behaviour is happeneing to see it it remains steady. I thought the issue is with the clamping of the output to 2.5V. Does the output scale as if the refrence voltage were at 2.5V or is the output linear as if the reference were to 3V then clamped at 2.5V?

    Regards,

    Padraic

  • Hi Padraic,

    Yes the reference is stable. I learned with when I had the 100R/1nF low-pass, that the reference can shift during oscillation, so I obviously it could also shift under other circumstances.

    I've posted another image showing a modified sweep that now goes 0x3FF, 0x200, 0x100,0x80, etc. and shows the Vref line through the process. As I'd suggested, the 0x3FF value gives exactly the same output as the 0x200.

    There's very little to the circuit now, but I'll describe just in case. I have 3V3 on pin 15, fed via a ferrite and 10R in series, and with 100nF//10uF to ground. Originally there was a slightly silly route for this, but it's now hard-wired between p15 & 100nF, about 3mm. I have 3V0 fed to pins 1-4 via a second ferrite and again with 100nF//10uF. All the Vouts are open circuit. All the other pins are as described in my first post. !0uFs are 0805, everything else 0603, all close to the pins.

    When I started this enquiry, I rather suspected I'd just made some silly misunderstanding

    As there's no obvious known cause to this, I'm starting to wonder whether these chips are all they appear. We've certainly seen numerous fake parts recently, and I'm starting to wonder if these are some. Odd though, as usually fake parts are pretty obviously wrong. These seem to kind-of work :-/

    A faulty batch might be a possibility .. do you happen to know if they're all tested?

    I forgot to answer one question and I think the answer might be interesting.

    It scales as if the reference was 6.6V, or possibly 3.3V and Gain x2.

    That seems to contradict all my setup pins.

    Another image. the 100Rs are removed, leaving the outputs O/C

    The power ferrite has 10R in series.

    Message was edited by: Gordon Scott adding observation on scaling and schematic clip.

  • This isn't exactly going to win me photographer of the year, but it shows the layout and the package marking.

    I changed the chip a few days back, which is why the soldering looks untidy, but it's sound enough.

    Four-layer board with a ground-plane.

  • I think I've seen the problem.

    My schematic shows p15 as power, duplicating PDs pin number. I think this chip has no power.

    I'm trying that now.

    Oh good grief! Yes it is! I don't know how many times I've checked that and not seen it.

    Works fine now.

    Message was edited by: Gordon Scott adding conclusion.

  • Hi Scott,

    Dont worry. This happens all the time. Glad you figured it out.

    Regards,

    Padraic

  • Hi Padraic,

    I guess in this case I couldn't see it because 15 and 16 look similar.

    My previous CAD wouldn't allow duplicate pins, which was an irritation.

    This one does allow them, which apparently is also an irritation.

    This was a case of more haste less speed, for the second time on this board.

    Trying desperatly to get this through for a tight deadling and missing the few significant warnings amongst the sea of ignorable ones. Ouch.

    Thanks for your help.