I am observing an AD5144 (actually 6 devices tested) not loading its configuration on power-up. On consecutive power-ups the configuration was sometimes loaded sometimes not.
The screenshot of the oscilloscope shows the measured supply voltages during power-up.
VDD = VLOGIC = RESET = DIS = WPN = LRDAC = 2.5 V
ADDR0 = ADDR1 = 0V
VSS = EXP = -2.5 V
SCL = SDA = floating
Has anyone of you an idea on how to solve this?
Would you also be able to provide the teminal voltages of the AD5144? You may want to look at the power up sequence section of the AD5144 on page 32 of the RevA. data sheet.
all A and B terminals are directly connected to +2.5V or -2.5V. The W terminals are connected to the + terminals of an OP4177 operated by +/-12 V.
May i know what the three scope shots represent? I'm assuming the pink one is the VDD/VLOGIC and the three others are the terminals?
Also take note that because there are diodes to limit the voltage compliance at Terminal A, Terminal B, and Terminal W (see Figure 48 of the AD5144 data sheet), it is important to power up VDD first before applying any voltage to Terminal A, Terminal B, and Terminal W. Otherwise, the diode is forward-biased such that VDD is powered unintentionally. The ideal power-up sequence is VSS, VDD, VLOGIC, digital inputs, and VA, VB, and VW. The order of powering VA, VB, VW, and digital inputs is not important as long as they are powered after VSS, VDD, and VLOGIC
the 3 screen shots in the post of 14.05.2014 show terminal voltage at W as yellow C1 and VLogic=+2.5V as red C2 during 3 power-ups.
Is it also a problem, when the terminals are powered up at the same time as VDD, VSS, VLOGIC? Since it is the same regulator the voltage is coming from, I don't know how to delay it.
Just a few more questions. What is your initial configuration? Is the voltage on the W terminal the expected value? When taking these scope shots, are SDA and SCL connected? or are they floating?