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AD7244 temporal +3Vout

Hi All,

One of my customers is planning to use AD7244 for his new design.

In his prototype test, he found that the DAC output, Vout, goes +3V at power up.

When he loads all zero data to the DAC, Vout goes 0V.

In his application, this temporal +3V is problem.

Are there any way to prevent this temporal +3V output at power-up?

 

Best Regards,

Ricky

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  • Hi Mark,

    My customer would like to see the scope shot of VDD, /TCLKA, /TFSA, and VOUTA with 4ch oscilloscope. Time/Div will be set to enough resolution to read rise time of those signals and power. He would like to see them in two versions, one is /TFSA=High (VDD) and the other one is /TFS=Low (GND).

    He also would like to hear your comment on the scope shot already sent from the customer.

    Sorry for repeated requests on this issue.

    Best Regards,

    Ricky

Reply
  • Hi Mark,

    My customer would like to see the scope shot of VDD, /TCLKA, /TFSA, and VOUTA with 4ch oscilloscope. Time/Div will be set to enough resolution to read rise time of those signals and power. He would like to see them in two versions, one is /TFSA=High (VDD) and the other one is /TFS=Low (GND).

    He also would like to hear your comment on the scope shot already sent from the customer.

    Sorry for repeated requests on this issue.

    Best Regards,

    Ricky

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