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AD7244 temporal +3Vout

Hi All,

One of my customers is planning to use AD7244 for his new design.

In his prototype test, he found that the DAC output, Vout, goes +3V at power up.

When he loads all zero data to the DAC, Vout goes 0V.

In his application, this temporal +3V is problem.

Are there any way to prevent this temporal +3V output at power-up?

 

Best Regards,

Ricky

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  • Hi Mark,

    I got answer to your question from my customer as next.

    1)   1) He doesn’t use any power on sequencer. -15V rail reaches final value much faster than +15V, therefore -5V rail power up faster than +5V rail. -5V and +5V are made by LDO from -15V and +15V respectively.

    2)   2) He lift up the output terminal of the AD7244 from the board, however, temporal +3V output still remain unchanged.

    Could you advise us any way to eliminate or reduce the temporal  +3V output at power-up?

    Best Regards,

    Ricky

Reply
  • Hi Mark,

    I got answer to your question from my customer as next.

    1)   1) He doesn’t use any power on sequencer. -15V rail reaches final value much faster than +15V, therefore -5V rail power up faster than +5V rail. -5V and +5V are made by LDO from -15V and +15V respectively.

    2)   2) He lift up the output terminal of the AD7244 from the board, however, temporal +3V output still remain unchanged.

    Could you advise us any way to eliminate or reduce the temporal  +3V output at power-up?

    Best Regards,

    Ricky

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