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AD7244 temporal +3Vout

Hi All,

One of my customers is planning to use AD7244 for his new design.

In his prototype test, he found that the DAC output, Vout, goes +3V at power up.

When he loads all zero data to the DAC, Vout goes 0V.

In his application, this temporal +3V is problem.

Are there any way to prevent this temporal +3V output at power-up?

 

Best Regards,

Ricky

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  • Hi Ricky,

    Could we ask the following to your costumer?

    • What is the power-up sequence that they are implementing? By the word document that you send me, it is VSS, then VDD. Is this the case?
    • What is the output voltage excluding/disconnecting the external circuitry (meaning no opamps after the DAC)?

    Regards,

    Mark

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  • Hi Ricky,

    Could we ask the following to your costumer?

    • What is the power-up sequence that they are implementing? By the word document that you send me, it is VSS, then VDD. Is this the case?
    • What is the output voltage excluding/disconnecting the external circuitry (meaning no opamps after the DAC)?

    Regards,

    Mark

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