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ADAU1978 and ADAU1962 LRCLK input jitter

For the ADAU1978 adc and ADAU1962 dac, when the pll input clock reference is LRCLK, what is the maximum jitter authorized on LRCLK?

I saw 300ps in ADAU1962 datasheet but I don’t know if it is true only when the PLL reference is MCLKin

Regarding the ADAU1978, no jitter value is given

Thanks for your feedback

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