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AD5623R Power-on Reset Circuit

Hi,


Please give me more information about the power-on reset circuit of AD5623R.

1) What is the start Vdd voltage of power-on reset?
2) Must it always be started up from 0 V for the power-on reset?
   Is there any requirements or margin?
3) Is there other requirements for the power-on reset?
   If the requirements is not followed, what is the output voltage?

Best regards,
Nikkee

Parents
  • 1. I don't know the exact reset voltage for the AD5663R. Based on similar DACs it usually happens between 2V and 2.5V.

    2. The power on reset is primarily used when powering from 0V. There will be some hysteresis in the circuit so if the power suppy dips below the trip point and rises again the power on reset circuit will run again.

    3. There are no other requirements for the power on reset. The power on reset will trigger whenever the supply passes the trip point. The DAC voltages will be set at 0V.

Reply
  • 1. I don't know the exact reset voltage for the AD5663R. Based on similar DACs it usually happens between 2V and 2.5V.

    2. The power on reset is primarily used when powering from 0V. There will be some hysteresis in the circuit so if the power suppy dips below the trip point and rises again the power on reset circuit will run again.

    3. There are no other requirements for the power on reset. The power on reset will trigger whenever the supply passes the trip point. The DAC voltages will be set at 0V.

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