Please tell me why when loading an array of 16 numbers on the SPI interface in the range from 0 to 1000 at the DAC output signal non-uniformity of speed there. Who has experience in supporting chains and who faced such a case.
To be able to assist you better, please provide a schematic diagram of the circuit that you are using and the code that you are sending to the part.
Hi! You have seen this pattern before. The picture presented by the output signal from the DAC. Speed SPI interface - 0.5 Mbps. On the horizontal axis of the waveform in one cell 50 microseconds, on the vertical axis 500 millivolts per division. The amplitude of the output signal of about 2.5 volts.
Data represent an array of numbers from 0 to 750 with increments of 50 which is input to DAC continuously.
It must be observed linear speed packet sequence.