AD5451

vlad-M7 on Jul 1, 2015

Please tell me why when loading an array of 16 numbers on the SPI interface in the range from 0 to 1000 at the DAC output signal non-uniformity of speed there. Who has experience in supporting chains and who faced such a case.

0 msamera

on Jul 1, 2015 9:18 PM
Hi,

To be able to assist you better, please provide a schematic diagram of the circuit that you are using and the code that you are sending to the part.

Regards,

Mark
Cancel
Up 0 Down

Reply

Verify Answer

Cancel
0 vlad-M7 on Jul 2, 2015 5:00 AM

Hi! You have seen this pattern before. The picture presented by the output signal from the DAC. Speed SPI interface - 0.5 Mbps. On the horizontal axis of the waveform in one cell 50 microseconds, on the vertical axis 500 millivolts per division. The amplitude of the output signal of about 2.5 volts.
Cancel
Up 0 Down

Reply

Verify Answer

Cancel
0 vlad-M7 on Jul 2, 2015 5:07 AM

Data represent an array of numbers from 0 to 750 with increments of 50 which is input to DAC continuously.

It must be observed linear speed packet sequence.
Cancel
Up 0 Down

Reply

Verify Answer

Cancel
0 EZAdministrator

on Aug 2, 2018 3:06 PM
This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

Thank you,
EZ Admin
Cancel
Up 0 Down

Reply

Reject Answer

Cancel